The present disclosure generally relates to semiconductor devices, and particularly to semiconductor devices including at least one selectively raised source/drain region that is laterally confined to an area of a contact via structure, and methods of manufacturing the same.
A raised source/drain region collectively refers to a class of regions including a raised source region and a raised drain region. A raised source region is a semiconductor region that is deposited on a semiconductor region of a field effect transistor and functions as a part of a source region of the field effect transistor. A raised drain region is a semiconductor region that is deposited on a semiconductor region of a field effect transistor and functions as a part of a drain region of the field effect transistor. A raised source/drain region can be formed on a pre-existing source/drain region by a selective deposition process, which deposits a semiconductor material only on semiconductor surfaces and does not deposit any semiconductor material on a dielectric surface.
A raised source/drain region in a field effect transistor provides various advantages in device characteristics including reduction of source and drain parasitic resistance. However, one of the disadvantages of the raised source/drain structure is an increase in the parasitic capacitance between the raised source/drain structure and the gate electrode of the field effect transistor.